It’s well known that the 555 timer IC is a very versatile piece of technology. (The fact that it’s still being produced after nearly forty years attests to this.)

…but can it compute?

As it turns out, the native “A * ~B” gate (see “Boolean Logic with 555s“) can be made into a S/R latch, with the addition of a few resistors and a diode. (The 555 actually does contain such a latch inside it, but not all of the latch ports are exposed as pins.) The diode is needed to block a low (inactive) signal from the Set pin from resetting the circuit when it is in the on state. The reset resistor (connected to DIS/CON, not RST) may not be needed; this design was hastily done in time for the 555 contest and I went with the first implementation that worked.

A transparent S/R latch using a single 555, a diode, and two resistors. (Click for larger view)

This S/R latch circuit allows a 555 to function as one bit of static RAM. With enough 555s — and no other active components –  a primitive (but Turing-complete!) computer can therefore be built, using only 555s! (For this implementation, I’m using diodes, which are technically active, but even these are not essential. Given enough 555s; S/R latches can be built from logic gates alone, which can be built from 555s, as demonstrated in another post. The diodes do help reduce the circuit size quite a bit, though.)

One tricky factor is the lack of tristate output functionality; the 555′s output is always high or low, never tristated. This can be mitigated by using OR gates (a NOR cascade with a final inverter, as shown below) to combine the various possible sources onto a single bus. As long as only one source is active at a time, its data will be carried through correctly — and no electrical contention (shorted outputs) is ever possible, even if more than one source does go active/high at one time. Multiplexing N outputs into a single line via OR logic therefore requires N+1 555s. (This could also probably be done with diodes and a pulldown resistor, but the eventual goal is an all-555 design.)

Building an OR multiplexer, to get around the tristate problem (click for larger view)

Since using 555s as logic gates is extremely inefficient in terms of space and wiring complexity, the computer design is necessarily quite simple. A six-bit word size allows for orthogonal instructions: 2-bit opcodes with 4-bit operands. This will allow for four possible operations, and 4-bit operands ranging from 0 to 15. Twenty-six or so 555s are needed for each word of memory, plus extras to combine them onto the output lines, so I have built just four six-bit words for the time being, rather than completing all sixteen possible memory locations. Another six-bit word for the accumulator has been completed, along with a four-bit word for the program counter. The 2-to-4 address decoder for the memory is complete (visible on the breadboard at the side). The rest of the control and processing logic is planned but not built at this point. Here’s the planned block diagram:

Block diagram; the memory, decoder, and multiplexer are complete. (Click for larger view)

Here’s a picture of the memory subsystem:

The 555 memory subsystem (4 words of 6 bits). All chips are 555s. (Click for larger view)

Here is a video of the memory in action (storing several words of data). The LEDs show the state of the memory; with the addition of a (mostly complete) NOR cascade multiplexer, the memory will be capable of outputting its data onto a single data bus. With the addition of a (completed but buggy) address demultiplexer, the memory subsystem will be ready to take its place in the 555 computer.

Unfortunately, lack of time (I get to do a lot of interesting things at my day job, but they do seem to insist that I show up for work) has prevented me from completing the entire design in time for the contest — but the design is feasible. Hopefully, I’ll be able to have the whole thing up and working sometime this summer. If so, I’ll post the details here.

The 555 timer IC (which I’ve covered before, but not in depth) is an interesting device. Recently, Jeri Ellsworth wondered on Facebook why the 555 wasn’t used in more designs. One thing led to another, and www.555contest.com was created. It has since really snowballed, and now Jeri, Forrest Mims, and Hans Camenzind (the inventor of the 555) are involved, along with many others. Good times to be an electronics geek, that’s for sure!

I’m a Digital Design geek by nature, so one of the first thoughts that occurred to me was to see if the 555 could be made to do Boolean logic. Looking at the schematic from the datasheet, it became apparent that it could, in fact, implement one (OK, two) of the six universal two-input gates. As it turned out, its specific native gate type is “A * ~B,” (“A AND NOT-B” or, if you like, “B AND NOT-A”) which is one of the two asymmetric universal gates (in other words, good luck finding *that* one as a 74xx chip. Or minimizing for it, for that matter!)

The native "A and NOT B" gate type for the 555

A test of the "A AND NOT-B" gate (click image for larger view)

“A*~B” gates are, however, universal: they can be combined to make any other type of logic gate. Tying A high, the gate becomes an inverter, which can then be used to make the basic gate into an AND or NOR gate, depending on which input is inverted.

An inverter made from the native A and NOT B gate

An AND gate, made from two 555s

A NOR gate made from two 555s

Adding a second 555-based inverter on the output creates a NAND or an OR gate, respectively.

This is, of course, an “off-label” use of the 555, so I tried various 555-based gates out in MultiSim. They worked well, so I physically built one of each, just to make sure they really would work that way. I haven’t done XOR and XNOR yet, but they can be made with combinations of the others (OR-and-NAND, and NOR-or-AND, respectively.) Here’s a video.

The circuit starts off (the two blue LEDs on the left) with a pair of 555s, each running in astable mode at a few Hertz each. The leftmost 555 runs at roughly — but not exactly — half the frequency of the second, providing interesting patterns as the two oscillators drift in and out of phase.

The third 555 (first green LED) is an inverter, with the “A” input () tied high, and the input of the faster oscillator tied to the “B” input.

The fourth 555 (second green LED) is a buffer, with the “B” input () tied low. It repeats the logic output of the inverter, and is included mostly because it was easy to do and for completeness.)

The fifth and sixth 555s form a NOR gate (red LED), with the 5th inverting the “A” input of the 6th, making a “NOT A AND NOT B” (NOR) gate.

The 7th and 8th 555s form an AND gate (yellow LED), with the 7th inverting the “B” input of the 8th.

555s 9 though 11 form a NAND gate (white LED; an AND gate with an inverted output).

555s 12 through 14 form an OR gate (purple LED; a NOR gate with an inverted output).

Yes, those really are 555s! (Click for larger view)

I’m currently working on a complete working computer made entirely from 555s (and a few diodes, at least for now, to reduce the part count a bit — although strictly speaking, these could be eliminated as well; flip-flops can be constructed from TTL gates. I have most of the design thought out, and hope to have the memory subsection (4 words of 6 bits, including addressing demultiplexer and I/O bus multiplexer) working in time for the 555 contest deadline. The rest of the computer is known to be possible, but unfortunately won’t be done in time for the contest; I’ll have to settle for submitting pieces and a sketch of how the whole thing would work. (Hey, that’s about as far as Babbage got!)